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1

[IEEE Proceedings of the 11th International Symposium on the Physical and Failure Analysis of Integrated Circuits. IPFA 2004 - Taiwan (5-8 July 2004)] Proceedings of the 11th International Symposium on the Physical and Failure Analysis of Integrated Circuits. IPFA 2004 (IEEE Cat. No.04TH8743) - The positive trigger voltage lowering effect for latch-up

Jian-Hsing Lee,, Wu-Te Weng,, Jiaw-Ren Shih,, Kuo-Feng Yu,, Tong-Chern Ong,

Year:

2004

Language:

english

File:

PDF, 244 KB

english, 2004

2

[IEEE 2020 IEEE Symposium on VLSI Circuits - Honolulu, HI, USA (2020.6.16-2020.6.19)] 2020 IEEE Symposium on VLSI Circuits - A 22nm 96KX144 RRAM Macro with a Self-Tracking Reference and a Low Ripple Charge Pump to Achieve a Configurable Read Window and a Wide Operating Voltage Range

Chou, Chung-Cheng, Lin, Zheng-Jun, Lai, Chien-An, Su, Chin-I, Tseng, Pei-Ling, Chen, Wei-Chi, Tsai, Wu-Chin, Chu, Wen-Ting, Ong, Tong-Chern, Chuang, Harry, Chih, Yu-Der, Chang, Tsung-Yung Jonathan

Year:

2020

File:

PDF, 545 KB

2020

3

Width dependence of substrate and gate currents in MOSFET's

Tong-Chern Ong, Simon Tam, Ping-Keung Ko, Cheming Hu

Journal:

IEEE Transactions on Electron Devices

Year:

1985

Language:

english

File:

PDF, 507 KB

english, 1985

4

50-Å gate-Oxide MOSFET's at 77 K

Tong-Chern Ong, Ko, P.K., Chenming Hu

Journal:

IEEE Transactions on Electron Devices

Year:

1987

Language:

english

File:

PDF, 775 KB

english, 1987

5

Process and circuit design interlock for application-dependent scaling tradeoffs and optimization in the SoC era

Diaz, C.H., Mi-Chang Chang, Tong-Chern Ong, Sun, J.Y.-C.

Journal:

IEEE Journal of Solid-State Circuits

Year:

2003

Language:

english

File:

PDF, 587 KB

english, 2003

6

[IEEE 2011 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA) - Hsinchu, Taiwan (2011.04.25-2011.04.27)] Proceedings of 2011 International Symposium on VLSI Technology, Systems and Applications - A novel program disturb mechanism through erase gate in a 110nm sidewall split-gate Flash memory cell

Wang, Hsin-Heng, Hung, Chih-Wei, Kuo, Hui-Hung, Yang, Tassa, Huang, Jim, Hwang, C. J., Lin, Yung-Tao, Ong, Tong-Chern, Tran, Luan C.

Year:

2011

Language:

english

File:

PDF, 309 KB

english, 2011

7

[IEEE 2010 IEEE International Reliability Physics Symposium - Garden Grove (Anaheim), CA, USA (2010.05.2-2010.05.6)] 2010 IEEE International Reliability Physics Symposium - Low-side driver's failure mechanism in a class-D amplifier under short circuit test and a robust driver device

Jian-Hsing Lee,, Shih, J.R., Tong-Chern Ong,, Kenneth Wu,

Year:

2010

Language:

english

File:

PDF, 726 KB

english, 2010

8

[IEEE 2013 IEEE International Solid-State Circuits Conference (ISSCC 2013) - San Francisco, CA (2013.2.17-2013.2.21)] 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers - Cycling endurance optimization scheme for 1Mb STT-MRAM in 40nm technology

Hung-Chang Yu,, Kai-Chun Lin,, Ku-Feng Lin,, Chin-Yi Huang,, Yu-Der Chih,, Tong-Chern Ong,, Chang, J., Natarajan, S., Tran, L. C.

Year:

2013

Language:

english

File:

PDF, 268 KB

english, 2013